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  IC培訓(xùn)
   
 
Cadence Allegro PCB 設(shè)計(V15.5)英文原版培訓(xùn)

 
  班級規(guī)模及環(huán)境--熱線:4008699035 手機(jī):15921673576( 微信同號)
      每個班級的人數(shù)限3到5人,互動授課, 保障效果,小班授課。
  上間和地點
上部份地點:【上?!客瑵?jì)大學(xué)(滬西)/新城金郡商務(wù)樓(11號線白銀路站)【深圳分部】:電影大廈(地鐵一號線大劇院站)/深圳大學(xué)成教院【北京分部】:北京中山學(xué)院/福鑫大樓【南京分部】:金港大廈(和燕路)【武漢分部】:佳源大廈(高新二路)【成都分部】:領(lǐng)館區(qū)1號(中和大道)【沈陽分部】:沈陽理工大學(xué)/六宅臻品【鄭州分部】:鄭州大學(xué)/錦華大廈【石家莊分部】:河北科技大學(xué)/瑞景大廈
最近開間(周末班/連續(xù)班/晚班):2019年1月26日
  實驗設(shè)備
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       1、培訓(xùn)過程中,如有部分內(nèi)容理解不透或消化不好,可免費(fèi)在以后培訓(xùn)班中重聽;
       2、培訓(xùn)結(jié)束后,授課老師留給學(xué)員聯(lián)系方式,保障培訓(xùn)效果,免費(fèi)提供課后技術(shù)支持。
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部份程大綱
 

Book I 內(nèi)容目錄

Lesson 1: Allegro PCB Editor User Interface
In this section you will be introduced to the Allegro PCB Editor. You will explore the Editor's graphical user interface as well as the various programs that comprise the Allegro PCB Editor system.

Lesson 2: Managing the PCB Editor Work Environment
In this section you will familiarize yourself with the user interface and understand how you can streamline repetitive tasks. You will also view the PCB Editor classes and subclasses, work with setting colors and visibility of objects, and learn how to use the Display > Element command to query design objects.

Lesson 3: Padstacks
In this section you will create padstacks that will be used to model pins in the PCB Editor footprint symbols and vias on the printed circuit board. You will also learn how to create Flash Symbols that are used to model Thermal Reliefs when designing with negative planes.

Lesson 4: Component Symbols
In this section you will create PCB Editor footprint symbols that model the components that are placed on the printed circuit board. You will learn how to use the Symbol wizard to create footprints and also how to manually create footprints.

Lesson 5: Board Design Files
In this section you will learn how to create board outlines or board mechanical symbols. Creating mechanical symbols can save you time when your designs use the same outline. Mechanical symbols will also improve the quality of the design, since the outline only needs to be checked once. After the outline has been verified, all designs using that outline will be correct.

Lesson 6: Importing Logic Information into Allegro PCB Editor
In this section you will learn about Logic Import, which is the process of importing logic from your schematic capture tool into the PCB Editor database. You will learn how to import from DE HDL into PCB Editor, from DE CIS into PCB Editor, and from a non-Cadence schematic tool, known as a third-party netlist.

Lesson 7: Setting Design Constraints
In this section you will set up your design rules. Design rules are known as constraints in the PCB Editor and are the rules that must be followed while routing
your design. Typical constraints are the line width to be used during routing, line-to-line spacing, line-to-pad spacing, and so on.

Lesson 8: Component Placement
In this section you will place components on your board. You will learn how to create Rooms and assign components to rooms, how to assign reference designators to preplaced symbols, and how to quickly place components. You will also learn the interactive commands available when working with placement.

Lesson 9: Advanced Placement
In this section you will learn some advanced placement techniques that can be used to aid you in the placement and ultimately the routing of your design. These techniques include controlling the display of ratsnests, swapping pins, components and gates, and cross probing between Design Entry HDL or Design Entry CIS and PCB Editor. You will also learn what steps are required when a physical library part is modified.

Lesson 10: Routing and Glossing
In this module you will learn how to interactively route your printed circuit board. You will learn how to add etch to make signal connections and will also learn the
commands used to edit existing etch on the board. You will use the PCB Router to auto-route your design.

Lesson 11: Copper Areas and Positive or Negative Planes
In this section you will learn about shapes. Shapes are used to represent copper areas, among other things. Shapes can be added to a routing layer and to a plane layer. This lesson will focus on using shapes to represent an internal plane. However, all the procedures and ideas presented when discussing positive shapes can be applied to creating copper areas on a routing layer.

Lesson 12: Preparing for Post Processing
In this section you will learn about preparing your design for post processing. This will include automatic and manual renaming of reference designators, and back-annotating your design changes to your schematic.

Lesson 13: Preparing the Board Design for Manufacturing
In this section you will learn more about preparing your design for post processing and will learn how to generate the required outputs. This will include creating silkscreens, generating reports, setting up for artwork, creating artwork files and creating NC files.


Book II 內(nèi)容目錄

Lesson 1: Customizing PCB Editor to Increase Productivity
In this lesson you will learn to customize the Allegro PCB Editor? environment to accelerate design work by using macros, scripts, aliases and function key definitions, and setting User Preferences options. This part of the course does not follow a design flow. The objective is to broaden your knowledge by introducing ways that can help you to become a productive user of the tool.

Lesson 2: Accessing Information to Enhance Productivity with PCB Editor
In this lesson you will learn how to identify and access information resources to increase productivity with PCB Editor.

Lesson 3: Constraint Manager
In this lesson you will become familiar with how the Constraint Manager works within the PCB Editor and how to use the Constraint Manager in the design flow of other Cadence tools.

Lesson 4: Advanced Constraints, Critical Routes, and Constraint Areas
In this lesson you will learn how to define advanced constraints for high-speed critical nets and set selected areas for different rules on the board.We will briefly review what was previously covered about the rules that can be added to the board through the PCB Editor tool. This lesson also takes rules a step further by routing the nets in PCB Router and checking them in the Constraint Manager to see if they meet the required specifications.

Lesson 5: Differential Pairs
In this lesson you will define diff pairs in the PCB Editor and Constraint Manager user interfaces;Interactively and automatically route diff pairs, meeting the requirements given. And Analyze the results to meet requirements

Lesson 6: Technology Files
In this lesson you will use technology files to reproduce design rules from board to board. This ensures that boards released to manufacturing will match design standards.

Lesson 7: Automatic Placement Tools
In this lesson we will discuss how to run the PCB Router autoplacement tool. The tool we cover here is an automatic placement solution within the Allegro PCB Router tool.

Lesson 8: Testpoint Generation
In this lesson, we will see how PCB Editor generates testpoints. Some systems require you to put extra component symbols into the logic design to then be placed as symbols in the board. The PCB Editor takes the existing board database, identifies and tags the locations with a triangle figure in the database, and produces a report and drill file as output.

Lesson 9: Interactive Etch Editing
Earlier in the course we covered the basics of routing and editing etch. Here we take it to the next level by showing you how you can use these techniques for low-speed and highspeed etch editing. The best way to learn these nuances is to use the tool. The intention here is to introduce you to some features to help you get your job done more effectively.

Lesson 10: Design Check for the PCB Router
In this lesson you will learn to use the pre-autoroute design checks in PCB Editor before submitting a board for PCB Routing. We will discuss three methods on how to translate a design from the PCB Editor to the PCB Router.

Lesson 11: Glossing
At this point in the design process, the logic has been loaded, the board mechanical has been defined, the design rules or constraints have been set, the components have been placed, and the board has routed. You will now use the automatic gloss programs to clean up the routed traces on the printed circuit board to make the board more manufacturable. In this lesson we will learn to use the PCB Editor glossing techniques to improve routing and make a board more manufacturable.

Lesson 12: Copper Planes
In this lesson you will review how to create split planes in your design. You will also learn about complex (nested) planes. Each one of these is defined on internal subclasses. You will learn to create both split planes and complex planes. A split plane is where one subclass of the board is divided into separate areas and tied to different voltages. Split planes can be defined in either negative or positive modes. A complex plane is similar but has a copper shape entirely surrounded by another copper shape. In this lesson we will define split and complex (nested) planes and determine how to create them on a board that has placed components.

端海教育實驗設(shè)備
android開發(fā)板
linux_android開發(fā)板
fpga圖像處理
fpga培訓(xùn)班*
 
本部份程部分實驗室實景
端海實驗室
實驗室
端海培訓(xùn)優(yōu)勢
 
  合作伙伴與授權(quán)機(jī)構(gòu)



Altera全球合作培訓(xùn)機(jī)構(gòu)



諾基亞Symbian公司授權(quán)培訓(xùn)中心


Atmel公司全球戰(zhàn)略合作伙伴


微軟全球嵌入式培訓(xùn)合作伙伴


英國ARM公司授權(quán)培訓(xùn)中心


ARM工具關(guān)鍵合作單位
  我們培訓(xùn)過的企業(yè)客戶評價:
    端海的andriod系統(tǒng)與應(yīng)用培訓(xùn)完全符合了我公司的要求,達(dá)到了我公司培訓(xùn)的目的。特別值得一提的是授部份講師針對我們公司的開發(fā)的項目專門提供了一些很好程序的源代碼,基本滿足了我們的項目要求。
——上海貝爾,李工
    端海培訓(xùn)DSP2000的老師,上部份思路清晰,口齒清楚,由淺入深,重點突出,培訓(xùn)效果是不錯的,
達(dá)到了我們想要的效果,希望繼續(xù)合作下去。
——中國電子科技集團(tuán)技術(shù)部主任馬工
    端海的FPGA培訓(xùn)很好地填補(bǔ)了高校FPGA培訓(xùn)空白,不錯??傊欣趯W(xué)生的發(fā)展,有利于教師的發(fā)展,有利于部份程的發(fā)展,有利于社會的發(fā)展。
——上海電子學(xué)院,馮老師
    端海給我們公司提供的Dsp6000培訓(xùn),符合我們項目的開發(fā)要求,解決了很多困惑我們很久的問題,與端海的合作非常愉快。
——公安部第三研究所,項目部負(fù)責(zé)人李先生
    MTK培訓(xùn)-我在網(wǎng)上找了很久,就是找不到。在端海居然有MTK驅(qū)動的培訓(xùn),老師經(jīng)驗很豐富,知識面很廣。下一個還想培訓(xùn)IPHONE蘋果手機(jī)。跟他們合作很愉快,老師很有人情味,態(tài)度很和藹。
——臺灣雙揚(yáng)科技,研發(fā)處經(jīng)理,楊先生
    端海對我們公司的iPhone培訓(xùn),實驗項目很多,確實學(xué)到了東西。受益無窮啊!特別是對于那種正在開發(fā)項目的,確實是物超所值。
——臺灣歐澤科技,張工
    通過參加Symbian培訓(xùn),再做Symbian相關(guān)的項目感覺更加得心應(yīng)手了,理論加實踐的授部份方式,很有針對性,非常的適合我們。學(xué)完之后,很輕松的就完成了我們的項目。
——IBM公司,沈經(jīng)理
    有端海這樣的DSP開發(fā)培訓(xùn)單位,是教育行業(yè)的財富,聽了他們的部份,茅塞頓開。
——上海醫(yī)療器械高等學(xué)校,羅老師
  我們最新培訓(xùn)過的企業(yè)客戶以及培訓(xùn)的主要內(nèi)容:
 

一汽海馬汽車DSP培訓(xùn)
蘇州金屬研究院DSP培訓(xùn)
南京南瑞集團(tuán)技術(shù)FPGA培訓(xùn)
西安愛生技術(shù)集團(tuán)FPGA培訓(xùn),DSP培訓(xùn)
成都熊谷加世電氣DSP培訓(xùn)
福斯賽諾分析儀器(蘇州)FPGA培訓(xùn)
南京國電工程FPGA培訓(xùn)
北京環(huán)境特性研究所達(dá)芬奇培訓(xùn)
中國科學(xué)院微系統(tǒng)與信息技術(shù)研究所FPGA高級培訓(xùn)
重慶網(wǎng)視只能流技術(shù)開發(fā)達(dá)芬奇培訓(xùn)
無錫力芯微電子股份IC電磁兼容
河北科學(xué)院研究所FPGA培訓(xùn)
上海微小衛(wèi)星工程中心DSP培訓(xùn)
廣州航天航空POWERPC培訓(xùn)
桂林航天工學(xué)院DSP培訓(xùn)
江蘇五維電子科技達(dá)芬奇培訓(xùn)
無錫步進(jìn)電機(jī)自動控制技術(shù)DSP培訓(xùn)
江門市安利電源工程DSP培訓(xùn)
長江力偉股份CADENCE培訓(xùn)
愛普生科技(無錫)數(shù)字模擬電路
河南平高電氣DSP培訓(xùn)
中國航天員科研訓(xùn)練中心A/D仿真
常州易控汽車電子WINDOWS驅(qū)動培訓(xùn)
南通大學(xué)DSP培訓(xùn)
上海集成電路研發(fā)中心達(dá)芬奇培訓(xùn)
北京瑞志合眾科技WINDOWS驅(qū)動培訓(xùn)
江蘇金智科技股份FPGA高級培訓(xùn)
中國重工第710研究所FPGA高級培訓(xùn)
蕪湖伯特利汽車安全系統(tǒng)DSP培訓(xùn)
廈門中智能軟件技術(shù)Android培訓(xùn)
上??坡囕v部件系統(tǒng)EMC培訓(xùn)
中國電子科技集團(tuán)第五十研究所,軟件無線電培訓(xùn)
蘇州浩克系統(tǒng)科技FPGA培訓(xùn)
上海申達(dá)自動防范系統(tǒng)FPGA培訓(xùn)
四川長虹佳華信息MTK培訓(xùn)
公安部第三研究所--FPGA初中高技術(shù)開發(fā)培訓(xùn)以及DSP達(dá)芬奇芯片視頻、圖像處理技術(shù)培訓(xùn)
上海電子信息職業(yè)技術(shù)學(xué)院--FPGA高級開發(fā)技術(shù)培訓(xùn)
上海點逸網(wǎng)絡(luò)科技有限公司--3G手機(jī)ANDROID應(yīng)用和系統(tǒng)開發(fā)技術(shù)培訓(xùn)
格科微電子有限公司--MTK應(yīng)用(MMI)和驅(qū)動開發(fā)技術(shù)培訓(xùn)
南昌航空大學(xué)--fpga高級開發(fā)技術(shù)培訓(xùn)
IBM公司--3G手機(jī)ANDROID系統(tǒng)和應(yīng)用技術(shù)開發(fā)培訓(xùn)
上海貝爾--3G手機(jī)ANDROID系統(tǒng)和應(yīng)用技術(shù)開發(fā)培訓(xùn)
中國雙飛--Vxworks應(yīng)用和BSP開發(fā)技術(shù)培訓(xùn)

 

上海水務(wù)建設(shè)工程有限公司--Alter/XilinxFPGA應(yīng)用開發(fā)技術(shù)培訓(xùn)
恩法半導(dǎo)體科技--AllegroCandencePCB仿真和信號完整性技術(shù)培訓(xùn)
中國計量學(xué)院--3G手機(jī)ANDROID應(yīng)用和系統(tǒng)開發(fā)技術(shù)培訓(xùn)
冠捷科技--FPGA芯片設(shè)計技術(shù)培訓(xùn)
芬尼克茲節(jié)能設(shè)備--FPGA高級技術(shù)開發(fā)培訓(xùn)
川奇光電--3G手機(jī)ANDROID系統(tǒng)和應(yīng)用技術(shù)開發(fā)培訓(xùn)
東華大學(xué)--Dsp6000系統(tǒng)開發(fā)技術(shù)培訓(xùn)
上海理工大學(xué)--FPGA高級開發(fā)技術(shù)培訓(xùn)
同濟(jì)大學(xué)--Dsp6000圖像/視頻處理技術(shù)培訓(xùn)
上海醫(yī)療器械高等專科學(xué)校--Dsp6000圖像/視頻處理技術(shù)培訓(xùn)
中航工業(yè)無線電電子研究所--Vxworks應(yīng)用和BSP開發(fā)技術(shù)培訓(xùn)
北京交通大學(xué)--Powerpc開發(fā)技術(shù)培訓(xùn)
浙江理工大學(xué)--Dsp6000圖像/視頻處理技術(shù)培訓(xùn)
臺灣雙陽科技股份有限公司--MTK應(yīng)用(MMI)和驅(qū)動開發(fā)技術(shù)培訓(xùn)
滾石移動--MTK應(yīng)用(MMI)和驅(qū)動開發(fā)技術(shù)培訓(xùn)
冠捷半導(dǎo)體--Linux系統(tǒng)開發(fā)技術(shù)培訓(xùn)
奧波--CortexM3+uC/OS開發(fā)技術(shù)培訓(xùn)
迅時通信--WinCE應(yīng)用與驅(qū)動開發(fā)技術(shù)培訓(xùn)
海鷹醫(yī)療電子系統(tǒng)--DSP6000圖像處理技術(shù)培訓(xùn)
博耀科技--Linux系統(tǒng)開發(fā)技術(shù)培訓(xùn)
華路時代信息技術(shù)--VxWorksBSP開發(fā)技術(shù)培訓(xùn)
臺灣歐澤科技--iPhone開發(fā)技術(shù)培訓(xùn)
寶康電子--AllegroCandencePCB仿真和信號完整性技術(shù)培訓(xùn)
上海天能電子有限公司--AllegroCandencePCB仿真和信號完整性技術(shù)培訓(xùn)
上海亨通光電科技有限公司--andriod應(yīng)用和系統(tǒng)移植技術(shù)培訓(xùn)
上海智搜文化傳播有限公司--Symbian開發(fā)培訓(xùn)
先先信息科技有限公司--brew手機(jī)開發(fā)技術(shù)培訓(xùn)
鼎捷集團(tuán)--MTK應(yīng)用(MMI)和驅(qū)動開發(fā)技術(shù)培訓(xùn)
傲然科技--MTK應(yīng)用(MMI)和驅(qū)動開發(fā)技術(shù)培訓(xùn)
中軟國際--Linux系統(tǒng)開發(fā)技術(shù)培訓(xùn)
龍旗控股集團(tuán)--MTK應(yīng)用(MMI)和驅(qū)動開發(fā)技術(shù)培訓(xùn)
研祥智能股份有限公司--MTK應(yīng)用(MMI)和驅(qū)動開發(fā)技術(shù)培訓(xùn)
羅氏診斷--Linux應(yīng)用開發(fā)技術(shù)培訓(xùn)
西東控制集團(tuán)--DSP2000應(yīng)用技術(shù)及DSP2000在光伏并網(wǎng)發(fā)電中的應(yīng)用與開發(fā)
科大訊飛--MTK應(yīng)用(MMI)和驅(qū)動開發(fā)技術(shù)培訓(xùn)
東北農(nóng)業(yè)大學(xué)--IPHONE蘋果應(yīng)用開發(fā)技術(shù)培訓(xùn)
中國電子科技集團(tuán)--Dsp2000系統(tǒng)和應(yīng)用開發(fā)技術(shù)培訓(xùn)
中國船舶重工集團(tuán)--Dsp2000系統(tǒng)開發(fā)技術(shù)培訓(xùn)
晶方半導(dǎo)體--FPGA初中高技術(shù)培訓(xùn)
肯特智能儀器有限公司--FPGA初中高技術(shù)培訓(xùn)
哈爾濱大學(xué)--IPHONE蘋果應(yīng)用開發(fā)技術(shù)培訓(xùn)
昆明電器科學(xué)研究所--Dsp2000系統(tǒng)開發(fā)技術(shù)
奇瑞汽車股份--單片機(jī)應(yīng)用開發(fā)技術(shù)培訓(xùn)


 

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